test: Add tests for all control instructions and base CPU implementation

2 files changed, 36 insertions, 0 deletions

diff --git a/Q1.core/Arch/Constants/ChipLayout.cs b/Q1.core/Arch/Constants/ChipLayout.cs
new file mode 100644
index 0000000..6990789
--- /dev/null
+++ b/Q1.core/Arch/Constants/ChipLayout.cs
@@ -0,0 +1,17 @@
+namespace Q1.core.Arch.Constants;
+
+public static class ChipLayout
+{
+    public const u16 MEMORY_START = 0x0000;
+    public const u16 MEMORY_SIZE = 0x4000; // 16KB of memory (0x0000 to 0x3FFF)
+    
+    public const u16 IVT_START = ChipLayout.MEMORY_START;
+    public const u16 IVT_COUNT = 128; // 128 interrupt vectors
+    public const u16 IVT_SIZE = ChipLayout.IVT_COUNT * 2; // Each vector is 2 bytes (u16)
+    
+    public const u16 STACK_START = ChipLayout.IVT_START + ChipLayout.IVT_SIZE;
+    public const u16 STACK_COUNT = 256;
+    public const u16 STACK_SIZE = ChipLayout.STACK_COUNT * 2; // Each stack entry is 2 bytes (u16)
+    
+    public const u16 PROGRAM_START = ChipLayout.STACK_START + ChipLayout.STACK_SIZE;
+}
\ No newline at end of file
diff --git a/Q1.core/Arch/Constants/ChipRegisters.cs b/Q1.core/Arch/Constants/ChipRegisters.cs
new file mode 100644
index 0000000..042ce32
--- /dev/null
+++ b/Q1.core/Arch/Constants/ChipRegisters.cs
@@ -0,0 +1,19 @@
+namespace Q1.core.Arch.Constants;
+
+public static class ChipRegisters
+{
+    public const u8 GENERIC_REGISTER_COUNT = 64;
+
+    public const u8 AX = 0x40;
+    public const u8 AH = 0x41;
+    public const u8 AL = 0x42;
+    
+    public const u8 DX = 0x44;
+    public const u8 DH = 0x45;
+    public const u8 DL = 0x46;
+    
+    public const u8 LX = 0x48;
+    
+    public const u8 PC = 0x4C;
+    public const u8 SP = 0x4D;
+}
\ No newline at end of file