diff options
| author | Melodi <62381002+Melodi17@users.noreply.github.com> | 2026-03-18 23:08:58 +1000 |
|---|---|---|
| committer | Melodi <62381002+Melodi17@users.noreply.github.com> | 2026-03-18 23:08:58 +1000 |
| commit | 7d20ff2a8e89e646fa79be69c8d07a512081daba (patch) | |
| tree | 67433c74d55f778065363010a593c44a0f65296b /Q1.core/Arch/InstructionEncoding.cs | |
| parent | 0bb62fc65526a0981cd328dea1b09aba8ce0a576 (diff) | |
test: Add tests for all control instructions and base CPU implementation
Diffstat (limited to 'Q1.core/Arch/InstructionEncoding.cs')
| -rw-r--r-- | Q1.core/Arch/InstructionEncoding.cs | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/Q1.core/Arch/InstructionEncoding.cs b/Q1.core/Arch/InstructionEncoding.cs new file mode 100644 index 0000000..479d61f --- /dev/null +++ b/Q1.core/Arch/InstructionEncoding.cs @@ -0,0 +1,26 @@ +namespace Q1.core.Arch; + +public static class InstructionEncoding +{ + public static void Decode(u16 instruction, out u8 opcode, out u8 m1, out u8 m2, out bool word) + { + word = ((instruction >> 15) & 0x1) != 0; // top bit + opcode = (u8)((instruction >> 8) & 0x7F); // 7 clean bits + + m1 = (u8)((instruction >> 4) & 0x0F); + m2 = (u8)(instruction & 0x0F); + } + + public static u16 Encode(u8 opcode, u8 m1, u8 m2, bool word) + { + u16 instruction = 0; + + instruction |= (u16)((opcode & 0x7F) << 8); // 7-bit opcode + instruction |= (u16)((word ? 1 : 0) << 15); // top bit flag + + instruction |= (u16)((m1 & 0x0F) << 4); + instruction |= (u16)(m2 & 0x0F); + + return instruction; + } +}
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