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-rw-r--r--Q1.tests/Core/Instructions/LogicInstructionTests.cs151
-rw-r--r--Q1.tests/Pipeline/AssemblerTests.cs59
2 files changed, 210 insertions, 0 deletions
diff --git a/Q1.tests/Core/Instructions/LogicInstructionTests.cs b/Q1.tests/Core/Instructions/LogicInstructionTests.cs
new file mode 100644
index 0000000..d0c0558
--- /dev/null
+++ b/Q1.tests/Core/Instructions/LogicInstructionTests.cs
@@ -0,0 +1,151 @@
+namespace Q1.tests.Core.Instructions;
+
+using core.Arch;
+using core.Arch.Lookups;
+using core.Components;
+
+[TestFixture]
+public class LogicInstructionTests : InstructionTestBase
+{
+ [TestCase(0x0000, 0x01)]
+ [TestCase(0x0001, 0x00)]
+ [TestCase(0x0005, 0x00)]
+ public void NotLxInstruction_PerformsNot(i32 input, i32 output)
+ {
+ // Arrange
+ var chip = this.CreateChip();
+ chip.Lx = (u16) input;
+
+ var instruction = InstructionEncoding
+ .Encode(
+ InstructionSet.GetOpcode("NOT(LX)"),
+ 0,
+ 0,
+ true);
+
+ chip.Bus.WriteWord(chip.Pc, instruction);
+
+ // Act
+ chip.Clock();
+
+ // Assert
+ u16 expected = (u16) output;
+ Assert.That(chip.Lx, Is.EqualTo(expected));
+ }
+
+ [TestCase(0x0000, 0x01)]
+ [TestCase(0x0001, 0x00)]
+ [TestCase(0x0005, 0x00)]
+ public void NotInstruction_PerformsNot(i32 input, i32 output)
+ {
+ // Arrange
+ var chip = this.CreateChip();
+
+ var instruction = InstructionEncoding
+ .Encode(
+ InstructionSet.GetOpcode("NOT"),
+ AddressingModes.GetAddressingMode("Immediate"),
+ 0,
+ true);
+
+ chip.Bus.WriteWord(chip.Pc, instruction);
+ chip.Bus.WriteWord((u16) (chip.Pc + 2), (u16) input);
+
+ // Act
+ chip.Clock();
+
+ // Assert
+ u16 expected = (u16) output;
+ Assert.That(chip.Lx, Is.EqualTo(expected));
+ }
+
+ [TestCase(0x0000, 0x0000, 0x01)]
+ [TestCase(0x0000, 0x0001, 0x00)]
+ [TestCase(0x0001, 0x0000, 0x00)]
+ [TestCase(0x0001, 0x0001, 0x01)]
+ [TestCase(0x1234, 0x5678, 0x00)]
+ [TestCase(0x8342, 0x8342, 0x01)]
+ public void CompareInstruction_ComparesCorrectly(i32 a, i32 b, i32 expected)
+ {
+ // Arrange
+ var chip = this.CreateChip();
+
+ var instruction = InstructionEncoding
+ .Encode(
+ InstructionSet.GetOpcode("CMP"),
+ AddressingModes.GetAddressingMode("Immediate"),
+ AddressingModes.GetAddressingMode("Immediate"),
+ true);
+
+ chip.Bus.WriteWord(chip.Pc, instruction);
+ chip.Bus.WriteWord((u16) (chip.Pc + 2), (u16) a);
+ chip.Bus.WriteWord((u16) (chip.Pc + 4), (u16) b);
+
+ // Act
+ chip.Clock();
+
+ // Assert
+ u16 expected16 = (u16) expected;
+ Assert.That(chip.Lx, Is.EqualTo(expected16));
+ }
+
+ [TestCase(0x0000, 0x0000, 0x00)]
+ [TestCase(0x0000, 0x0001, 0x01)]
+ [TestCase(0x0001, 0x0000, 0x00)]
+ [TestCase(0x0001, 0x0001, 0x00)]
+ [TestCase(0x1234, 0x5678, 0x01)]
+ [TestCase(0x8342, 0x1234, 0x00)]
+ public void LessThanInstruction_ComparesCorrectly(i32 a, i32 b, i32 expected)
+ {
+ // Arrange
+ var chip = this.CreateChip();
+
+ var instruction = InstructionEncoding
+ .Encode(
+ InstructionSet.GetOpcode("LT"),
+ AddressingModes.GetAddressingMode("Immediate"),
+ AddressingModes.GetAddressingMode("Immediate"),
+ true);
+
+ chip.Bus.WriteWord(chip.Pc, instruction);
+ chip.Bus.WriteWord((u16) (chip.Pc + 2), (u16) a);
+ chip.Bus.WriteWord((u16) (chip.Pc + 4), (u16) b);
+
+ // Act
+ chip.Clock();
+
+ // Assert
+ u16 expected16 = (u16) expected;
+ Assert.That(chip.Lx, Is.EqualTo(expected16));
+ }
+
+ [TestCase(0x0000, 0x0000, 0x00)]
+ [TestCase(0x0000, 0x0001, 0x00)]
+ [TestCase(0x0001, 0x0000, 0x01)]
+ [TestCase(0x0001, 0x0001, 0x00)]
+ [TestCase(0x5678, 0x1234, 0x01)]
+ [TestCase(0x1234, 0x8342, 0x00)]
+ public void GreaterThanInstruction_ComparesCorrectly(i32 a, i32 b, i32 expected)
+ {
+ // Arrange
+ var chip = this.CreateChip();
+
+ var instruction = InstructionEncoding
+ .Encode(
+ InstructionSet.GetOpcode("GT"),
+ AddressingModes.GetAddressingMode("Immediate"),
+ AddressingModes.GetAddressingMode("Immediate"),
+ true);
+
+ chip.Bus.WriteWord(chip.Pc, instruction);
+ chip.Bus.WriteWord((u16) (chip.Pc + 2), (u16) a);
+ chip.Bus.WriteWord((u16) (chip.Pc + 4), (u16) b);
+
+ // Act
+ chip.Clock();
+
+ // Assert
+ u16 expected16 = (u16) expected;
+ Assert.That(chip.Lx, Is.EqualTo(expected16));
+ }
+} \ No newline at end of file
diff --git a/Q1.tests/Pipeline/AssemblerTests.cs b/Q1.tests/Pipeline/AssemblerTests.cs
new file mode 100644
index 0000000..4eb36bb
--- /dev/null
+++ b/Q1.tests/Pipeline/AssemblerTests.cs
@@ -0,0 +1,59 @@
+namespace Q1.tests.Pipeline;
+
+using core.Arch;
+using core.Arch.Constants;
+using core.Arch.Lookups;
+using core.Pipeline;
+
+[TestFixture]
+public class AssemblerTests
+{
+ private Assembler CreateAssembler()
+ {
+ return new Assembler();
+ }
+
+ private byte[] Assemble(string source)
+ {
+ var assembler = this.CreateAssembler();
+ var reader = new StringReader(source);
+ return assembler.Assemble(reader).ToArray();
+ }
+
+ [Test]
+ public void Assembler_ShouldAssembleSimpleProgram()
+ {
+ // Arrange
+ string source = """
+ mov 0x1234, ax
+ """;
+
+ // Act
+ var result = Assemble(source);
+
+ // Assert
+ MemoryStream expected = new MemoryStream();
+ WriteWord(expected, InstructionEncoding.Encode(
+ InstructionSet.GetOpcode("MOV"),
+ AddressingModes.GetAddressingMode("Immediate"),
+ AddressingModes.GetAddressingMode("Register"),
+ true));
+ WriteWord(expected, 0x1234);
+ WriteByte(expected, ChipRegisters.AX);
+
+ Assert.That(result, Is.EqualTo(expected.ToArray()));
+ }
+
+ private void WriteByte(MemoryStream stream, byte value)
+ {
+ stream.WriteByte(value);
+ }
+
+ private void WriteWord(MemoryStream stream, ushort value)
+ {
+ u8 high = (u8) (value & 0xFF);
+ u8 low = (u8) ((value >> 8) & 0xFF);
+ stream.WriteByte(low);
+ stream.WriteByte(high);
+ }
+} \ No newline at end of file